π Memory protection in contiguous memory allocation (9 MCQs)
π From Operating System β’ 8. Main Memory β’ 9 questions available
What is Memory protection in contiguous memory allocation?
Definition:
Protection in contiguous allocation uses base and limit registers to ensure a process can only access memory within its allocated contiguous block preventing overlap.
Example:
If base and limit , any access to address where or triggers a hardware trap.
Reason:
Hardware-enforced bounds checking prevents buggy or malicious code from corrupting adjacent processes or OS kernel maintaining system stability.
π All Memory protection in contiguous memory allocation MCQs
Q1. What is the purpose of the base register in a CPU's memory protection scheme?
π Explanation: The base register holds the lowest physical address that a process is allowed to access. This ensures the process cannot read or write below that point, protecting the operating system and other processes. Options A and C describe functions of other mechanisms (limit register and MMU), while D relates to CPU mode, not address range. By storing the start of the allowed region, the base register establishes the lower bound of memory protection.
Q2. Why is a limit register needed in addition to a base register?
π Explanation: The limit register defines the size of the address space by specifying how many bytes above the base are permissible. Together with the base, it creates a range from base to baseβ―+β―limitβ―ββ―1. Without the limit, a process could roam beyond its allocated region. Option A incorrectly states the limit gives the highest address directly, while B and C describe unrelated functions. The limit ensures the upper bound, completing the protection range.
Q3. How does the combination of base and limit registers support virtual memory abstraction?
π Explanation: The base and limit registers define a contiguous physical segment for a process, so the OS can move that whole segment by updating the base value while the process keeps using the same logical addresses. This enables relocation without altering the program's code. Option A describes paging, which uses page tables, not base/limit registers. Option B mentions simplification of translation, but the primary benefit is relocation, not just simplification. Option D refers to encryption, which base/limit registers do not provide. Therefore, the ability to relocate the process transparently is the key advantage.
Q4. Given a base register value of 300040 and a limit register value of 120900, what is the highest legal physical address the process may access?
π Explanation: The highest legal address equals the base address plus the limit size minus one. Performing the calculation shows that the process may access addresses up to 420939 inclusive. Option B matches this result. Option A adds the limit without subtracting one, giving 420940, which would be just beyond the allowed range. Option C adds an extra thousand, and Option D is below the base address, both of which are invalid. The CPU uses this check to raise a protection fault if a program tries to exceed the limit, ensuring isolation.
Q5. A user process with base 500000 and limit 20000 attempts to read address 525000. What will the CPU do?
π Explanation: When the CPU generates a physical address, it compares the offset against the limit register. The attempted address 525000 exceeds the allowed range (baseβ―+β―limitβ―ββ―1β―=β―519999), so the hardware triggers a protection fault, halting the instruction and signalling the operating system. Option B is wrong because the limit, not just physical memory availability, governs access. Option C involves paging, which is unrelated to base/limit checks. Option D would defeat the purpose of memory protection, so the correct response is a fault.
Q6. When the operating system switches from Process X to Process Y, which action is essential to maintain memory protection using base and limit registers?
π Explanation: During a context switch, the OS must load the base and limit registers with the values belonging to the newly scheduled process. This ensures that any subsequent memory reference is checked against the correct address range, preventing the new process from accessing memory belonging to the previous one. Clearing the registers would cause every access to fault. Leaving them unchanged would retain the old process's limits, breaking isolation. Swapping without updating would not reflect the new process's memory layout.
Q7. How does the base/limit protection mechanism compare to paging or segmentation in terms of isolation?
π Explanation: Base and limit registers define a single contiguous block of physical memory for a process, allowing the CPU to perform a quick comparison for each access. This simplicity makes hardware enforcement efficient. Paging, by contrast, breaks memory into pages and requires a page table lookup, adding overhead but offering finer granularity. Segmentation can allow multiple noncontiguous segments, which is more flexible but also more complex. Base/limit are not software-only; they are hardware-supported registers, making option A the accurate description.
Q8. If a process has a base register of 400000 and a limit register of 0, which physical addresses can it legally access?
π Explanation: A limit value of zero indicates a region size of zero, meaning the process is not permitted to access any physical address. Any attempted access will produce an offset that exceeds the limit, causing the CPU to raise a protection fault immediately. Option A would be true only if the limit were defined as the highest permissible offset, which is not the case here. Options C and D suggest broader access, contradicting the zero-size restriction.
Q9. Two processes have overlapping address ranges because their base and limit registers were set incorrectly. What is the most likely consequence?
π Explanation: When address ranges overlap, the hardware cannot distinguish which process owns a particular physical location, so a write by one process can overwrite data belonging to the other. This can corrupt program state, cause crashes, or expose sensitive information. The operating system typically does not intervene at the moment of overlap, so option A is unlikely. The CPU does not serialize execution based on address overlap, and it does not reroute accesses to kernel space, making option B the expected outcome.