๐ Standard swapping in main memory (15 MCQs)
๐ From Operating System โข 8. Main Memory โข 15 questions available
What is Standard swapping in main memory?
Definition:
Swapping moves entire processes between main memory and secondary storage (backing store) to free RAM for other processes when memory is overcommitted.
Example:
An idle process occupying is swapped out to disk and later swapped back in when the user resumes interaction restoring its complete state.
Reason:
Swapping enables degree of multiprogramming beyond physical memory limits though context switch overhead increases due to full process transfer.
๐ All Standard swapping in main memory MCQs
Q1. A user program requests to load its code into memory. Which action performed by the operating system guarantees that the program cannot modify the OS code or other users' memory?
๐ Explanation: The operating system uses a privileged instruction that can only run in kernel mode to load the base and limit registers. Because only the OS can execute privileged instructions, a user program cannot change these registers, preventing it from accessing or altering memory belonging to the OS or other users. Options B, C, and D either give the user too much control or remove protection, so they would not stop unauthorized modification.
Q2. What is the primary purpose of the base register in a protected memory system?
๐ Explanation: The base register contains the physical address where a process's logical address space begins. By adding the base value to a logical address, the hardware translates it to a real memory location. This ensures each process accesses only its own allocated region. The other options describe unrelated functions: size is managed by the limit register, the instruction pointer tracks execution, and I/O status is handled by separate registers.
Q3. Why can only the operating system modify the contents of base and limit registers?
๐ Explanation: Base and limit registers are changed only through a privileged instruction, which the CPU permits when running in kernel (supervisor) mode. User programs execute in user mode and cannot invoke privileged instructions, so they cannot alter these registers. This restriction keeps user code from expanding its address space or bypassing protection. The other choices are incorrect: the registers are not readโonly, arithmetic ability is unrelated, and physical inaccessibility is not the enforcement mechanism.
Q4. A process has base register = 3000 and limit register = 1200. The process generates a logical address 4250. Which outcome will occur?
๐ Explanation: The logical address 4250 is compared to the limit value 1200. Since 4250โฏ>โฏ1200, the address exceeds the allowed range, causing the hardware to raise a protection fault (trap) and transfer control to the operating system. The OS can then handle the error, typically terminating the offending process. Options A and D incorrectly assume the address is permitted, and option C suggests an undefined wrapโaround behavior that does not exist in base/limit protection.
Q5. How does adding a base register to a logical address implement address translation?
๐ Explanation: When a process generates a logical address, the hardware adds the value stored in the base register to this address, yielding the corresponding physical address in main memory. This simple arithmetic provides isolation because each process can have a different base value. Options A and B describe unrelated operations, and option D introduces encryption, which is not part of base/limit translation.
Q6. During a context switch on a multiprocessor, the OS must save the current process's registers to memory. Which register must be stored before loading the next process's base register?
๐ Explanation: A complete context switch requires preserving the program counter (to know where to resume), the base register (to retain the current address space), and the limit register (to keep the protection bounds). Saving all three ensures that when the next process is loaded, its own base and limit can be installed without losing the previous process's state. Any answer that omits one of these registers would risk incorrect execution after the switch.
Q7. A user program attempts to write to address 8500 while its limit register is 8000. What will the hardware do?
๐ Explanation: The hardware compares the requested address with the limit value. Because 8500โฏ>โฏ8000, the access violates the defined bounds, so the CPU generates a protection fault (trap) and passes control to the operating system. The OS can then terminate the program or take corrective action. Options A and C incorrectly assume the hardware permits the outโofโrange operation, and option D suggests automatic limit expansion, which is not part of base/limit protection.
Q8. Compared to segmentation, what is a key advantage of using simple base and limit registers for protection?
๐ Explanation: Base and limit registers perform a single bound check for each memory reference, making the hardware logic simpler and faster than the multiple checks often needed in segmented schemes. This reduction in complexity speeds up address translation. Options A and D describe capabilities of more sophisticated schemes, while option C is not a typical advantage of simple base/limit protection.
Q9. Two processes, P1 and P2, need to share a readโonly data region located at physical addresses 15000โ15999. The OS sets base registers to 15000 for both and limit registers to 1000. Which additional configuration ensures P2 cannot write to this region while P1 can?
๐ Explanation: Base and limit registers only enforce address bounds, not readโonly versus readโwrite permissions. To prevent P2 from writing, the OS must run P2 with a readโonly privilege flag (or similar protection mode) so that any write attempt to the shared region triggers a fault. Options A and D either remove access entirely or rely on hardware features not described, while option B refers to paging, which is outside the simple base/limit model.
Q10. Why are base and limit registers insufficient by themselves to prevent bufferโoverflow attacks that overwrite adjacent data structures?
๐ Explanation: Base and limit registers guarantee that a program cannot access memory outside its allocated range, but they do not understand the layout of variables inside that range. A buffer overflow can corrupt neighboring structures while staying within the allowed address space, so the protection fails. Options B, C, and D are incorrect: user programs cannot modify the registers, limits are not autoโexpanded, and encryption is unrelated to overflow detection.
Q11. Given base = 2000, limit = 500, a program issues a logical address 2300. Determine whether the access is allowed and, if so, compute the physical address.
๐ Explanation: The logical address 2300 exceeds the limit of 500, meaning it lies outside the process's permitted range. The hardware therefore generates a protection fault, and the access is denied. Because the address is invalid, no physical address is calculated. Options A and D incorrectly assume the address is valid and perform the addition, while option B mistakenly treats the logical address as the physical address without applying the base.
Q12. During swapping, which register must be saved to ensure the process can resume execution at the correct point after being swapped back in?
๐ Explanation: The program counter holds the address of the next instruction to execute. When a process is swapped out, its current execution point must be preserved so that, after being swapped back in, it can continue exactly where it left off. Saving the base, limit, or stack pointer alone would not guarantee correct continuation; only the program counter provides that precise location.
Q13. How does enforcing privileged instruction execution only in kernel mode enhance the security of a swapping system?
๐ Explanation: Privileged instructions, such as those that load base and limit registers, are only allowed in kernel mode. This restriction stops user programs from altering the memory protection mechanism, ensuring that only the operating system can change address limits or base addresses. Consequently, malicious or buggy user code cannot compromise isolation. Options B, C, and D describe effects that are either opposite of the security goal or unrelated to privilege enforcement.
Q14. The system is low on free memory and decides to swap out Process X. Which ordered steps does the OS typically perform?
๐ Explanation: The usual sequence begins by saving the process's registers so its execution state is preserved. Next, the OS writes the process's memory contents to secondary storage, updates the page table to mark those pages as swapped out, and finally releases the physical frames for other uses. Options B, C, and D reorder these steps in ways that could lose state or waste resources.
Q15. What is the relationship between a limit register's value and the maximum size of a process's address space?
๐ Explanation: The limit register holds the size of the addressable range for a process; it specifies the largest legal logical offset (often expressed as the highest address plus one). This value, together with the base register, determines the total size of the process's virtual address space. The other options misinterpret the purpose of the limit register or claim no relationship, which is inaccurate.