📝 Hardware support in Paging (31 MCQs)

📖 Explanation: The relocation register stores the base value that the MMU adds to each logical address, turning it into a physical address. This makes the correct answer A. Options B, C, and D describe different registers that either hold segment information or index offsets, which are not used for simple relocation. Understanding the role of the relocation register is essential for recognizing how address translation works in hardware.

📖 Explanation: Logical addresses start at zero and extend up to the maximum logical address defined for the process, denoted as max. Therefore option A is correct. Option B mixes logical and physical ranges, option C suggests a fixed offset, and option D incorrectly states that logical addresses are always zero. Recognizing the logical address range is fundamental when mapping to physical memory.

📖 Explanation: The address a program generates before the MMU changes it is called a logical address. Hence A is correct. Physical addresses (B) are the results after translation, virtual addresses (C) are often synonymous with logical addresses but the question targets the specific term logical address, and mapped address (D) is not standard terminology. Knowing this term helps students follow address translation steps.

📖 Explanation: A is correct because the relocation register lets the same program run at any physical base, removing dependence on fixed addresses. Option B is false; compilation is still required. Option C is unrelated to speed, and D misstates the role of paging, which is a different memory‑management technique. Portability stems from logical‑to‑physical mapping performed at run time.

📖 Explanation: The correct answer is A because the MMU can enforce limits on which physical addresses a process may reach, providing protection. Options B and C describe unrelated hardware functions, while D contradicts the purpose of isolation. Recognizing this link shows how translation not only relocates but also secures memory.

📖 Explanation: Changing the register only influences addresses generated after the change, so A is correct. Existing pointers retain their old logical values and will be translated using the old base, making B incorrect. Cache behavior (C) is unrelated, and processes do not need to restart (D). This nuance is critical for understanding runtime address binding.

📖 Explanation: Since each logical address L is translated to physical address $R+L$, the overall physical range begins at R and ends at $R+max$; therefore A is correct. Options B and C ignore the addition of L, and D claims no dependence, which contradicts the translation rule. Relating ranges helps students visualize address mapping.

📖 Explanation: The MMU adds the relocation value only when the address is sent to memory, so the program only ever sees logical values, making A correct. Compilation (B) does not alter run‑time visibility, CPUs do handle physical addresses internally (C), and encryption (D) is unrelated. This explains the abstraction layer provided by hardware.

📖 Explanation: Pointer arithmetic is performed on logical addresses, so the MMU postpones translation until the pointer is used in a memory operation, confirming A. Immediate conversion (B) would break the logical model, disabling arithmetic (C) is impractical, and requiring software (D) defeats the hardware purpose. Understanding this delay clarifies how programs manipulate addresses safely.

📖 Explanation: Execution‑time binding lets the OS place a process at any physical location by setting the relocation register, offering flexibility, so A is correct. Compile‑time binding fixes addresses, limiting relocation. Options B, C, and D describe unrelated benefits that do not stem from when binding occurs. Recognizing this advantage highlights dynamic memory management.

📖 Explanation: Because each process's MMU adds its unique relocation value, their logical address spaces map to distinct physical regions, making A correct. Sharing the same region (B) would cause collisions, disabling the MMU (C) removes protection, and masking (D) is not part of this simple scheme. This separation is vital for multitasking safety.

📖 Explanation: To hold the entire logical range after translation, the system needs physical memory covering the highest possible address $R+max$; thus A is correct. Having only max bytes (B) would ignore the base offset, and independence (C) contradicts the mapping rule. Exact R (D) would miss the logical span. This relationship guides memory‑capacity planning.

📖 Explanation: The MMU adds the base (R = 20000) to the logical address (500), giving $20000+500=20500$. Therefore option A is correct. Option B misplaces a zero, C is too small, and D adds an extra 5000. Calculating the sum demonstrates how relocation works in practice.

📖 Explanation: When the load occurs, the MMU adds the current base (15000) to the stored logical pointer (1200), resulting in $15000+1200=16200$. Hence A is correct. Options B and C ignore the base, and D mistakenly divides the sum. This illustrates that pointers are translated only at the moment of memory access.

📖 Explanation: Process A translates to $10000+300=10300$ and B to $20000+300=20300$; therefore option A lists the correct pair. The other options either ignore the base or give incomplete mappings. This scenario shows how distinct bases keep processes isolated even with identical logical addresses.

📖 Explanation: When physical memory is exhausted, there is no room to place a process at its required base, so new processes cannot be loaded—option A. Logical‑to‑physical mapping still works mathematically (B), the registers themselves remain functional (C), and pointers retain their values (D). Recognizing this limitation connects address translation to overall memory capacity.

📖 Explanation: If the program adds offsets to an assumed zero base, it will address locations that the MMU maps to unintended physical regions, often causing illegal accesses and a segmentation fault—option A. Execution speed (B) is unrelated, and the OS does not silently fix such logic errors (D). Understanding this mistake highlights why programs must treat addresses as logical.

📖 Explanation: Stored pointers retain the logical value they held; when later used, the current base (now 16000) is added, so they are translated with the new base, not the old one. Thus A is correct: the old base is not remembered. Options B and D describe behavior not present in this scheme, and C exaggerates the effect. This nuance is key for developers handling dynamic bases.

📖 Explanation: To map logical 0 to physical 8000, the relocation register must contain 8000, because the translation is $R+L$. Hence option A is correct. Using 4000 (B) would map 0 to 4000, 12095 (C) would map 0 to 12095, and 0 (D) would leave addresses unchanged. This simple calculation shows how the base determines the whole range.

📖 Explanation: The highest physical address is $R+max = 50000 + 65535 = 115535$. Option A matches this sum. Option B omits the base, C gives only the base, and D adds an extra zero. Performing the addition demonstrates how the relocation register expands the addressable space.

📖 Explanation: Accessing an out‑of‑range logical address violates the process's address space limits, so the MMU raises a protection (or segmentation) fault—option A. Wrapping (B) would corrupt data, ignoring bits (C) defeats protection, and automatic allocation (D) is not part of simple relocation. This behavior enforces memory safety.

📖 Explanation: After increment, p equals $250+100=350$. The MMU adds the base: $14000+350=14350$. Wait, that matches option B, not A. Correction: the correct physical address is 14350, so the correct answer is B. Option A adds the base to the original pointer, C adds incorrectly, and D miscalculates. This demonstrates how pointer arithmetic combines with relocation at the moment of access.

📖 Explanation: By loading a new base value before accessing each segment, the same relocation mechanism can act as a rudimentary segment selector—option A. Ignoring segmentation (B) defeats the purpose, storing limits (C) is not what the register does, and swapping the MMU (D) is unnecessary. This shows how the basic scheme can be extended.

📖 Explanation: Dynamic loading places the module at physical 30000, and the relocation register is set to the same value, so logical address 0 maps to physical 30000. Thus the program perceives the module starting at logical 0—option A. The other options either repeat the physical address or add offsets, which are not how logical addresses are presented.

📖 Explanation: Each process has its own relocation base, so the same logical address (e.g., 0) maps to different physical locations, preserving independence—option A. Sharing the same physical region (B) would cause conflicts, copying (C) defeats sharing benefits, and merging spaces (D) is not part of this scheme. This illustrates per‑process address translation.

📖 Explanation: With a zero base, logical address 0 maps to physical 0, so any reference that should have been offset by 12000 will instead hit the low‑memory region—option A. The expected region (B) is missed, and C doubles the intended offset. Recognizing this error shows why correct base initialization is critical.

📖 Explanation: Adding a segment selector that picks the appropriate base before translation allows multiple segments, each with its own base—option A. A larger register (B) still provides only one base, removing it (C) loses translation, and assigning one base per process (D) does not give per‑segment flexibility. This extension builds on the original concept.

📖 Explanation: The translation rule is simply $Physical = R + L$; therefore option A is correct. Subtracting, dividing, or multiplying (options B‑D) do not follow the defined relocation behavior. This straightforward calculation is the core of the scheme and helps students quickly determine actual memory locations.

📖 Explanation: When the pointer (logical 0) is finally used, the current base value (5000) is added, so the accessed physical address is $5000+0=5000$—option A. The pointer does not retain the old base, so option B is wrong, and options C and D introduce unnecessary calculations. This scenario highlights that relocation is applied at use time, not at storage time.

📖 Explanation: Pointer comparison uses the logical values directly; therefore 100 is less than 200, making the statement true—option A. Relocation does not affect the comparison because it occurs only when the pointers are used for memory access. Options B and C misinterpret the effect of relocation, and D denies a basic operation.

📖 Explanation: Performing relocation at access time means the base can change during execution, enabling dynamic loading and process movement—option A. Reducing registers (B) or speeding decoding (C) are not primary reasons, and compilation (D) is unrelated. This timing ensures flexibility and supports modern operating‑system techniques.