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📝 Kernel I/O Subsystem

📖 From Operating System • 13. I/O Systems • 5 questions available

Practice MCQs for Kernel I/O Subsystem. Test your knowledge with carefully crafted questions across easy, medium, and hard difficulty levels.

🔄 Last updated: 2026-07-27

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Easy Questions
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Medium Questions
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Hard Questions

📝 Sample Questions

Q1. If a low‑priority maskable interrupt (vector 90) arrives while the CPU is handling a non‑maskable exception (vector 14), what will the CPU do?

🔹 A. It will immediately service the low‑priority interrupt.
🔹 B. It will finish the non‑maskable exception before considering the maskable interrupt.
🔹 C. It will discard the low‑priority interrupt.
🔹 D. It will treat the low‑priority interrupt as non‑maskable.

💡 Difficulty: easy | ✅ Correct: B

Q2. A driver receives interrupt vector number 45 from a device. Which statement correctly describes its priority and maskability?

🔹 A. It is a non‑maskable interrupt with the highest priority.
🔹 B. It is a maskable interrupt with medium priority, allowing higher‑priority interrupts to preempt it.
🔹 C. It is a non‑maskable interrupt but with low priority.
🔹 D. It is a maskable interrupt that cannot be preempted by any other interrupt.

💡 Difficulty: medium | ✅ Correct: B

Q3. After the OS has booted, a hot‑plug PCI network card reports interrupt vector 120. What must the OS do to ensure the new device’s interrupts are serviced correctly?

🔹 A. Ignore it because interrupt vectors are fixed at boot.
🔹 B. Register a new handler in the vector table at entry 120 and enable the corresponding IRQ line.
🔹 C. Replace the existing handler at vector 120, even if it belongs to another device.
🔹 D. Reboot the system to re‑probe all hardware.

💡 Difficulty: hard | ✅ Correct: B

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🔗 Related Topics

📝 Overview of I/O Systems📝 I/O Hardware in I/O Systems📝 Polling in I/O Hardware📝 Interrupts in I/O Hardware📝 Direct memory access in I/O Hardware
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