โ† Back to 10. Programmable Keyboard and Display Interface: 8279

๐Ÿ“ Display Interface of 8279

๐Ÿ“– From An Introduction To Microprocessor 8085 โ€ข 10. Programmable Keyboard and Display Interface: 8279 โ€ข 10 questions available

Practice MCQs for Display Interface of 8279. Test your knowledge with carefully crafted questions across easy, medium, and hard difficulty levels.

๐Ÿ”„ Last updated: 2026-07-30

2
Easy Questions
5
Medium Questions
3
Hard Questions

๐Ÿ“ Sample Questions

Q1. To read the count from counter 2, which set of control signal levels must be asserted?

๐Ÿ”น A. CS low, RD low, WR high, A1 high, A0 low
๐Ÿ”น B. CS low, RD high, WR low, A1 low, A0 low
๐Ÿ”น C. CS high, RD low, WR low, A1 high, A0 high
๐Ÿ”น D. CS low, RD low, WR low, A1 low, A0 high

๐Ÿ’ก Difficulty: easy | โœ… Correct: A

Q2. A designer connects pins 13โ€‘15 of the 8253 to a peripheral that needs a clock pulse every 10โ€ฏยตs. Which pin provides the clock input for counterโ€ฏ1, and what must be the state of the GATEโ€ฏ1 pin for the counter to count continuously?

๐Ÿ”น A. Pinโ€ฏ13, GATEโ€ฏ1 low
๐Ÿ”น B. Pinโ€ฏ15, GATEโ€ฏ1 high
๐Ÿ”น C. Pinโ€ฏ14, GATEโ€ฏ1 low
๐Ÿ”น D. Pinโ€ฏ15, GATEโ€ฏ1 low

๐Ÿ’ก Difficulty: medium | โœ… Correct: B

Q3. In a system, the CS pin is inadvertently left floating (neither driven low nor high). Explain the likely effect on all read/write operations and suggest a hardware fix.

๐Ÿ”น A. Device will always be enabled, causing bus contention
๐Ÿ”น B. Device will never respond, leading to no operation
๐Ÿ”น C. Device may randomly enable, causing intermittent failures
๐Ÿ”น D. Device will ignore address lines but still respond to data

๐Ÿ’ก Difficulty: hard | โœ… Correct: C

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๐Ÿ”— Related Topics

๐Ÿ“ INTEL Programmable Keyboard/Display Interface 8279๐Ÿ“ Block Diagram of 8279๐Ÿ“ Functional Description of 8279๐Ÿ“ Key Board San of 8279๐Ÿ“ Scanned Keyboard of 8279
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