📖 11. Programmable Interrupt Controller: 8259

📖 From An Introduction To Microprocessor 8085 • 162 questions available

About 11. Programmable Interrupt Controller: 8259

The 8085 only has one INTR pin for regular interrupts. What if you have multiple devices (a keyboard, a mouse, a disk drive) that all need to interrupt the CPU at the same time? The 8259 is a "traffic controller" for interrupts. It can manage up to eight interrupt requests from different devices and prioritize them. When a device sends an interrupt, the 8259 decides which one is the most important, tells the 8085 about it, and even provides the correct memory address (the vector) for the CPU to jump to.

How It Works: You configure the 8259 using "Initialization Command Words" (ICWs) and "Operation Command Words" (OCWs). These set up the chip's mode of operation and the priority scheme (e.g., fixed priority, where IR0 is highest and IR7 is lowest, or rotating priority, where the priority changes). When an interrupt request comes in, the 8259 sends a signal to the 8085's INTR pin. The 8085 then asks the 8259, "What's the vector address?" The 8259 then places the correct address on the data bus, allowing the CPU to jump directly to the appropriate ISR for that device.

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🔄 Last updated: 2026-07-30