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πŸ“ Binary Ladder D/A Converter in 8085 Microprocessor

πŸ“– From An Introduction To Microprocessor 8085 β€’ 13. Interfacing Data converters: A/D and D/A Converters β€’ 19 questions available

Practice MCQs for Binary Ladder D/A Converter in 8085 Microprocessor. Test your knowledge with carefully crafted questions across easy, medium, and hard difficulty levels.

πŸ”„ Last updated: 2026-07-30

4
Easy Questions
9
Medium Questions
6
Hard Questions

πŸ“ Sample Questions

Q1. When the mode word \(0x42\) is written to the Mode Set Register at address \(0x78\), which operation is being configured for channel 0?

πŸ”Ή A. Enable channel 0 for a memory‑read transfer
πŸ”Ή B. Disable channel 0
πŸ”Ή C. Enable channel 1 for a memory‑write transfer
πŸ”Ή D. Reset the DMA controller

πŸ’‘ Difficulty: easy | βœ… Correct: A

Q2. In the 8257 mode word, which bits determine whether a channel is enabled, and what value must they have to activate channel 0?

πŸ”Ή A. Bits D7‑D6 set to 00
πŸ”Ή B. Bits D3‑D2 set to 01
πŸ”Ή C. Bits D7‑D6 set to 01
πŸ”Ή D. Bits D0‑D1 set to 11

πŸ’‘ Difficulty: medium | βœ… Correct: C

Q3. Why does the 8257 encode the channel number in bits D7‑D6 of the mode word rather than using a separate register?

πŸ”Ή A. To reduce I/O port usage
πŸ”Ή B. Because those bits are unused otherwise
πŸ”Ή C. To allow simultaneous configuration of multiple channels
πŸ”Ή D. For backward compatibility with older DMA designs

πŸ’‘ Difficulty: hard | βœ… Correct: A

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